Receiver GPS L1 C/A-code, SPS
Chip set & Tracking sensitivity SiRF IV, GSD4e, -163 dBm
Channels 48
Update rate (default) 1 Hz max (fix rate configurable)
Supply voltage, VDD +1.71… +1.89 V
Supply voltage ripple, VDD 54 mV(RMS) max @ f = 0… 3MHz
15 mV(RMS) max @ f > 3 MHz
Power consumption (note 1) 56 mW (Switcher mode) or 68 mW (LDO mode) typ. @ VDD=1.8 V
Power consumption (Hibernate state)
36 uW typical @ 1.8 V
Antenna net gain range 0…+25 dB
Antenna bias voltage VDD_ANT +/- 5.5 V (externally generated)
Antenna bias current VDD_ANT 70 mA rated max
Storage temperature -40ºC…+85ºC
Host port configuration SPI (default), UART or I2C
Serial port protocol (UART) NMEA (configurable to SiRF binary OSP)
Serial data format (UART) 8 bits, no parity, 1 stop bit
Serial data speed (UART) 4800 baud (configurable)
I/O signal levels CMOS compatible: low state 0… +0.4 V max;
high state 0.75…1.0xVDD. Inputs are 3.6 V tolerable
I/O output sink/source capability +/- 2 mA max
I/O input leakage +/- 10 uA max
TM output (1PPS) 200ms high pulse
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